[Speex-dev] Speex split across processors?

Jean-Marc Valin Jean-Marc.Valin at USherbrooke.ca
Mon Apr 4 19:18:15 PDT 2005

Le lundi 04 avril 2005 à 19:03 -0700, Paul Fagerburg a écrit :
> Well, it's an ARM7TDMI core, so basically one register operation per
> clock, with memory accesses taking longer.  

Multiply instructions usually take more than one cycle, sometimes up to
5 cycles depending on the exact core. That's the main factor that will
determine whether Speex will run or not.

> Having the memory on-chip
> should make memory access much less of an impact.

Actually, I think Speex fits mostly into cache, so that may not be that
much of an issur.

> I was afraid that you would answer the way you did: I thought about my
> question after I sent it, and the "LP" in CELP is what makes it a
> sequential process; it can't do linear prediction on a frame that the
> other processor is encoding.

Actually, it's mainly the CE that's causing problem (the LP could have
been worked around otherwise) ;-) 

> I'm looking at a specific set of parameters, probably 6kbps without
> VAD.  It doesn't have to sound great, just understandable.  Being able
> to recognize the person's voice on the other end is also a
> requirement. 

I recommend compiling with SHORTCUTS and SHORTCUTS2 defined and using
complexity 0. The 6 kbps mode is slightly less complex than 8 kbps, but
not that much. Also, there's always the possibility to sample at 7 kHz
instead of 8 kHz to same a few cycles.


Jean-Marc Valin <Jean-Marc.Valin at USherbrooke.ca>
Université de Sherbrooke

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