[Tremor] reg: 32 bit representation

[Monty]

On Thu, Mar 31, 2005 at 12:57:41PM +0530, Dhanabal wrote:
> Can you please explain the phrase a little clearly "two-integer floating
> point representation" . I assumed that tremor is fixed point code for 32 bit
> DSP processors. I am working on a 32 bit fixed point DSP processor that does
> have shifters as you have mentioned.

Tremor, for that vector multiplication, is using a mantissa integer
and an exponent integer per 'value'.  In general, this is a most
efficient mechanism on DSPs with shiftable ALU imputs, but shiftable
inputs are not actually terribly important for the multiplication
(more useful for adds/subtracts).

Monty