[Tremor] (no subject)
EXTERN Wacker Klaus (Extern; CM-DI/ESP1)
Klaus.Wacker at de.bosch.com
Wed Oct 6 03:53:03 PDT 2004
>-----Original Message-----
>From: EXTERN Wacker Klaus (Extern; CM-DI/ESP1)
>Sent: 06 October 2004 08:40
>To: tremor at xiph.org
>Subject: [Tremor] Tremor lowmem on TI 55x DSP
>
> I try to port Tremor lowmem on TI 55x DSP.
> I am not familiar with the 54x and actually I just started to work
with
the 55x.
> But here is a short summery
> 55x 54x
> 2 16bit MAC 1 17bit MAC
> 3 data read busses 2 data read busses
> 2 data write busses
> 32 KW (64KB) DRAM ?
> 64 KW (128KB) SRAM ?
> Better DMA
> Can only address words(2 bytes, can you believe this) ?
> Fast SDRAM interface ?
> Instruction cache ?
> The ALUs seemed to be similar
> Because of only three read data busses (stupid ) the two MACs have to
share one
> parameter (or it is a constant which is in register)
> Therefore the two MACs do not produce the double amount of MAC
operations
> Thanks for the help
> Klaus
Actually I think the double MAC with shared coefficient is a good design
idea and it'll give much the same performance as two whole MAC units.
Easy
example: in stereo streams you'll be doing the same operation on two
independent arrays using the same coefficients. Less obvious example:
the
real and imaginary parts of a complex multiply in a radix-2 FFT can
still be
done simultaneously.
Usually I find I'm just wasting instructions doubling up coefficients in
SIMD multipliers (e.g Intel MMX/SSE). I'm guessing the TI 55x
implementation
takes way less silicon and battery.
- John Ripley.
You are right,but my point was, that you do not have the choice and you
can not expect always the double performance (or half the cycles)
just because you have two MACs.
Klaus
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