[Theora-dev] FPGA implementation

John Kintree jkintree at swbell.net
Thu Nov 18 13:30:42 PST 2004

On Thursday 18 November 2004 02:57 pm, Andrey Filippov wrote:
> I believe I really am on schedule, design seems to fit in the FPGA both in
> resources ( will use around 65-75%) and timing. For the coding itself ...

Wow. Thank you for that more detailed update, Andrey.

Some readers of this list might be interested to know that the FPGA  being 
used in the Elphel model 333 network camera is a "Xilinx Spartan 3 1000K 
gates" chip.

I think I saw a press release at the Xilinx web site dated about a year ago 
that mentioned the price of the Spartan 3 1000k FPGA to be $12.

There is a press release dated November 8, 2004 that announces the release of  
lower power FPGAs, the Spartan-3L family.  The 1000k gates member of this 
family has a price of less than $14.  Xilinx also mentions in this press 
release that they have "shipped over 100 million Spartan Series devices."

That is mighty sweet.

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