[Speex-dev] Updated MIPs and memory requirements for TI c54x or c55DSPs

[Jim Crichton]

John,

> I can see that there has been some effort to compile the SPEEX codec to operate on the 
> TI c54x and c55x DSPs and I am wondering if anyone would be able to update the 
> mailing list with their current MIPs and Memory resource requirements for their c54x
> and/or c55x compilation? The only estimate I was able to find in the mailing list archive 
> was 42MIPs but I'm not sure if this is an estimate for the c54x or the c55x. If possible, 
> it would also be helpful to see a .map file of a compilation for one of the TI DSPs.

The 42 MIP number was from my post of 24 May, and it was for C55x and Speex 1.1.8.  I tested 1.1.10 yesterday, and the number went down very slightly; it was just over 41 MIPs peak measured in 20 ms blocks on MALE.WAV, for encoder/decoder loop, 8kbps narrowband with minimum complexity.  C54x was just awful in comparison (>200 MIPs, not enough for real time), and I abandoned that family and switched to the C5509A.  At least one other user has made some optimizations for C54x and gotten the MIPs down some, but the C55x family seems to like Speex a lot better (32-bit math support is more efficient).  I had promised Jean-Marc to make a reference build for others to look at, but I have not got around to that yet.  I can send you the .pjt and .cmd files that I used, if you like.

Regards,

Jim Crichton
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.xiph.org/pipermail/speex-dev/attachments/20050817/ddc467a5/attachment.html