[Flac-dev] Implementing a flac-decoder in VHDL
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Tue Jan 22 04:26:16 PST 2008
my name is Axel Reimer and I am new to this mailing list. I subscribed
because I was just thinking about how hard it would be to implement a
flac-decoder in VHDL (in order to use it on a Xilinx-FPGA).
Since I am working at a University in Germany I was thinking of offering
this project for students.
What do you think. How much time would you suggest for such an
implementation (if only one students with VHDL knowledge works on it)
and where is a good point to start?
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