[Flac-dev] VHDL Implementation?

[Josh Coalson]

--- Alijah Ballard <ABallard at iname.com> wrote:
> I'm currently looking to start my working on my major project for 
> College. I want to create an audio CD archival/ playback server.
> There 
> will be a base server and also several satellite players. I will be 
> building a secondary server for my car. And in the car power is at a 
> premium so I wanted true hardware support (unlike phatnoise which is 
> software based). The car will support both playback and archival.
> There 
> will be a wireless (802.11a?) link between both servers which will
> sync when in range.
> 
> I found this link:   http://www.celoxica.com/home.htm
> They have a C to (V)HDL converter. I'm just now learning VHDL and was
> wondering if anyone has tried to implement it yet. If so I would like
> to see your code for reference/starting point.

I'm not that familiar with the Celoxica tool but I would guess
that running libFLAC though it would give an inefficient
implementation, even less than libFLAC + CPU core.  The roadblocks
are things like malloc for buffer management and the clunkiness
of bit processing in C.

My day job has been in EDA for several years now so I tried to
design FLAC with efficient hardware implementations in mind.  I
have some ideas about how to do it and have wanted to do a
decoder in Verilog (my VHDL's not as good) but it's way way
down on my TODO list.  In any case, a FLAC decoder will be
much less complex than, say, an MP3 decoder.  Instead of
MDCT modelling, FLAC uses a simple small order FIR filter.
Instead of Huffman coding, FLAC uses much simpler Rice codes.
FLAC decode requires only integer math (no fixed point even).
All of the hard stuff is in the encoder.

Feel free to post questions or progress reports here.  Also,
consider hosting it on OpenCores (http://www.opencores.org).

Josh


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