[tremor] Tremor HW (FPGA) implementation

[Guillermo Guichal]

I'm a professor for an FPGA based digital design class and my students
proposed a Vorbis audio decoder as a final project (actually they
proposed mp3, I changed it to Vorbis). We have Spartan IIe (200)
development boards but I'm afraid we won't be able to implement the
decoder due to lack of memory (only 56 Kbits internal memory in the
FPGA)

I've been looking through the archives and found several postings
regarding the implementation of a HW Vorbis decoder. Has anybody been
working on this or looked into the memory requirements for the decoder.

Thanks, Guillermo Guichal

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