[tremor] Start up time / overhead

[David Hembrow]

Monty wrote:
>Our encoder, for any selected mode and input type (that is, if you
>keep the sample rate, channels and passed in paramteres the same),
>will use the same setup header.  If the samples are all short and all
>using the same parameters, you can store them as raw, headerless files
>and just store the header once somewhere.

I'd like to know how to do this. At present, I'm calling an ov_open*
function customized to include the callbacks for our filing system and
ov_read. Presumably I need to read a bit more and work out which functions
to call.

>Following the above scheme, you would not need to tear down/restart
>the decoder for each sample.  Just keep feeding packets and it will
>keep playing back.

That sounds ideal.

>Transform codecs, honestly, are not ideal for speech and sibilance
>suffers first.

The sound from the low bit rate Vorbis sounds a bit dull, but not
really very much worse than it does from the other 8kHz sampling
schemes I've tried. If the 12% improvement in performance lets me
use 11kHz sound instead, I think it likely I'll be ahead of the
other 8kHz schemes while still using fewer bits.

>We're happy to take patches that increase portability.

OK. I've included a diff between the 1.1 version of asm_arm.h and
the asm_arm.h I'm using.

>For ARM, however, modern GCC is way ahead of MSVC.  If performance
>is important you won't easily beat GCC.

I'm not using MSVC, I'm using the ARM ADS 1.1 (we have 1.2, but
haven't moved to it yet). Do you know how the code generation of
ADS compares with GCC ? The generated code I've seen certainly
looks pretty good.

David.

<p>asm_arm.h diff:
a21 158
#ifdef __arm
static inline ogg_int32_t MULT32(ogg_int32_t x, ogg_int32_t y) {
  int lo,hi;
  __asm {
          smull  lo, hi, x, y
  }
  return(hi);
}

tatic inline ogg_int32_t MULT31(ogg_int32_t x, ogg_int32_t y) {
  return MULT32(x,y)<<1;
}

tatic inline ogg_int32_t MULT30(ogg_int32_t x, ogg_int32_t y) {
  return MULT32(x,y)<<2;
}

tatic inline ogg_int32_t MULT31_SHIFT15(ogg_int32_t x, ogg_int32_t y) {
  int lo,hi;
  __asm {
          smull  lo, hi, x, y
          mov    lo, lo, lsr #15
          orr    hi, lo, hi, lsl #17
  }
  return(hi);
}

tatic inline ogg_int32_t CLIP_TO_15(ogg_int32_t x) {
        int tmp;
        __asm {
                subs   tmp,x,#32768
                movpl  x, #0x7f00
                orrpl  x, x, #0xff
                adds   tmp,x,#32768
                movmi  x,#0x8000
        }
        return(x);
}

#endif

#ifndef _V_LSP_MATH_ASM
#define _V_LSP_MATH_ASM

tatic inline void lsp_loop_asm(ogg_uint32_t *qip,ogg_uint32_t *pip,
                                ogg_int32_t *qexpp,
                                ogg_int32_t *ilsp,ogg_int32_t wi,
                                ogg_int32_t m){

  register int tmpr0, tmpr1, tmpr2, tmpr3;
  ogg_uint32_t qi=*qip,pi=*pip;
  ogg_int32_t qexp=*qexpp;

  __asm{
          mov     tmpr0, qexp
          mov     tmpr1, m, asr#1
          add     tmpr0,tmpr0,tmpr1,lsl#3
      label1:
//        ldmdb   tmpr0!,{tmpr1,tmpr3}
          ldr tmpr3,[tmpr0,#-4]!        // equivalent to above, but works with ARM C compiler
          ldr tmpr1,[tmpr0,#-4]!
          subs    tmpr1,tmpr1,wi          //ilsp[j]-wi
          rsbmi   tmpr1,tmpr1,#0          //labs(ilsp[j]-wi)
          umull   qi,tmpr2,tmpr1,qi       //qi*=labs(ilsp[j]-wi)

          subs    tmpr1,tmpr3,wi          //ilsp[j+1]-wi
          rsbmi   tmpr1,tmpr1,#0          //labs(ilsp[j+1]-wi)
          umull   pi,tmpr3,tmpr1,pi       //pi*=labs(ilsp[j+1]-wi)

          cmn     tmpr2,tmpr3             // shift down 16?
          beq     label0
          add     qexp,qexp,#16
          mov     qi,qi,lsr #16
          orr     qi,qi,tmpr2,lsl #16
          mov     pi,pi,lsr #16
          orr     pi,pi,tmpr3,lsl #16
      label0:
          cmp     tmpr0,ilsp
          bhi     label1

      // odd filter assymetry
          ands    tmpr0,m,#1
          beq     label2
          add     tmpr0,ilsp,m,lsl#2

          ldr     tmpr1,[tmpr0,#-4]
          mov     tmpr0,#0x4000

          subs    tmpr1,tmpr1,wi          //ilsp[j]-wi
          rsbmi   tmpr1,tmpr1,#0          //labs(ilsp[j]-wi)
          umull   qi,tmpr2,tmpr1,qi       //qi*=labs(ilsp[j]-wi)
          umull   pi,tmpr3,tmpr0,pi       //pi*=labs(ilsp[j+1]-wi)

          cmn     tmpr2,tmpr3             // shift down 16?
          beq     label2
                  add     qexp,qexp,#16
          mov     qi,qi,lsr #16
          orr     qi,qi,tmpr2,lsl #16
          mov     pi,pi,lsr #16
          orr     pi,pi,tmpr3,lsl #16

      //qi=(pi>>shift)*labs(ilsp[j]-wi);
      //pi=(qi>>shift)*labs(ilsp[j+1]-wi);
      //qexp+=shift;

      //}

      /* normalize to max 16 sig figs */
      label2:
          mov     tmpr2,#0
          orr     tmpr1,qi,pi
          tst     tmpr1,#0xff000000
          addne   tmpr2,tmpr2,#8
          movne   tmpr1,tmpr1,lsr #8
          tst     tmpr1,#0x00f00000
          addne   tmpr2,tmpr2,#4
          movne   tmpr1,tmpr1,lsr #4
          tst     tmpr1,#0x000c0000
          addne   tmpr2,tmpr2,#2
          movne   tmpr1,tmpr1,lsr #2
          tst     tmpr1,#0x00020000
          addne   tmpr2,tmpr2,#1
          movne   tmpr1,tmpr1,lsr #1
          tst     tmpr1,#0x00010000
          addne   tmpr2,tmpr2,#1
          mov     qi,qi,lsr tmpr2
          mov     pi,pi,lsr tmpr2
          add     qexp,qexp,tmpr2
  }

  *qip=qi;
  *pip=pi;
  *qexpp=qexp;
}

tatic inline void lsp_norm_asm(ogg_uint32_t *qip,ogg_int32_t *qexpp){

  ogg_uint32_t qi=*qip;
  ogg_int32_t qexp=*qexpp;

  __asm{
        tst     qi,#0x0000ff00
        moveq   qi,qi,lsl #8
        subeq   qexp,qexp,#8
        tst     qi,#0x0000f000
        moveq   qi,qi,lsl #4
        subeq   qexp,qexp,#4
        tst     qi,#0x0000c000
        moveq   qi,qi,lsl #2
        subeq   qexp,qexp,#2
        tst     qi,#0x00008000
        moveq   qi,qi,lsl #1
        subeq   qexp,qexp,#1
  }
  *qip=qi;
  *qexpp=qexp;
}
#else           // Use GCC inlines
a179 1
#endif
--- >8 ----
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