[tremor] A possible improvement for some of the processor where tables hit hard
marc dukette
dukette at adelphia.net
Sat Oct 19 20:09:21 PDT 2002
Monty is right there appears to be an issue(which I do not quite understand)
with shifting 32 bits, it always ends up as -1. If you use the constant 32
it works, but with a variable it always fails. A friend mentioned something
about shift commands not being able to do a full 32 bit shift and that it
only works with the contant value of 32 becasue the ocmpile optimizes it to
0.
This would be a nice improvement for some processors if it could be made to
work.
----- Original Message -----
From: "Nicolas Pitre" <nico at cam.org>
To: "Monty" <xiphmont at xiph.org>
Cc: <tremor at xiph.org>
Sent: Saturday, October 19, 2002 10:02 PM
Subject: Re: [tremor] A possible improvement for some of the processor where
tables hit hard
<p>> On Wed, 16 Oct 2002, Monty wrote:
>
> > On Sun, Oct 13, 2002 at 04:01:56PM -0400, marc dukette wrote:
> > > I have replaced the mask table in bitwise.c with the following, and
while it
> > > has little to no effect on an SA processor it does appear to help the
> > > version we have running on MIPS, so it may be of value to other
processors
> > > as well:
> > >
> > > old:
> > > unsigned long m= mask[bits];
> > >
> > > new:
> > > unsigned long m= (((unsigned int)-1)>>(32-bits));
> > >
> > > and of course you can now remove the mask table. I'm just throwing
this
> > > out, not sure if it's worth adding to the standard or not.
> >
> > Good basic idea, but not equivalent. In the case where bits==0...
>
> What's wrong here? 0xffffffffUL >> (32 - 0) should be 0 like the lookup
> table.
>
> Or what about: unsigned long m = (1 << bits) - 1;
>
> The ARM assembly for this could be just this:
>
> mov r1, #1
> rsb r1, r1, r1, lsl r0
>
> where r0 = bits and r1 = m. This would certainly be faster than a table
> lookup, but I doubt any compiler would generate that by itself though.
>
>
> Nicolas
>
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