[tremor] A possible improvement for some of the processor where tables hit hard
Monty
xiphmont at xiph.org
Sat Oct 19 21:23:27 PDT 2002
> What's wrong here? 0xffffffffUL >> (32 - 0) should be 0 like the lookup
> table.
Not on Intel, which limit a shift to five bits. Funny, I was pretty
certain ARM did too. Shift 32 == shift 0.
Monty
--- >8 ----
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