[Theora-dev] 16 bits, cast on idct function

Ralph Giles giles at xiph.org
Wed May 31 12:32:59 PDT 2006

On Wed, May 31, 2006 at 04:26:50PM -0300, Felipe Portavales Goldstein wrote:
> IDCT_SLOW VHDL model is working
> but I neet optimize it to consume less FPGA resources like multiplyers.
> i will send to svn this night


This runs in ghdl?


More information about the Theora-dev mailing list