[theora-dev] IDCTSlow works on a FPGA prototype test

[Felipe Portavales Goldstein]

The goal is to get a FPGA with a small embeded generic processor, and
just the critical modules in hardware running the Theora decoder.

This system could be in FPGA plugged as a PCI card, and this system
could communicate with your PC motherboard through the PCI bus.

There is some FPGA's models assembled in a PCI card. I think that it
would not be difficult to do a Theora PCI acceleration board.
But the PCI protocoll is a little confusing, and we would must to do a
small Linux kernel module to controll the PCI card (this would not be
a problem).

:-D


On 6/14/06, Ralph Giles <giles at xiph.org> wrote:
> On Wed, Jun 14, 2006 at 10:41:14AM +0100, Philip Heron wrote:
>
> > Is the plan to make a standalone hardware decoder, or to use the FPGA as
> > a replacement for certain functions in libtheora? I love the idea of
> > plugging in a PCI card and all apps using libtheora get instant hardware
> > acceleration.
>
> Portavales is doing a Google Summer of Code project on this. The idea is
> to do a hardware decoder, but a complete implementation is a little
> ambitious for the 3 month term, so the plan is to run libtheora on
> a cpu (for example the LGPL LEON design) and have it call out to
> custom hardware for specific functions. It's a way to make piecemeal
> hardware implementation possible. A "real" theora decoder chip could
> then reuse the performance critical modules.
>
> So yes, you could put that on an FGPA PCI card and get acceleration
> in a normal host.
>
> Cheers,
>  -r
>


-- 
________________________________________
Felipe Portavales <portavales at gmail.com>
Undergraduate Student - IC-UNICAMP
Computer Systems Laboratory
http://www.lsc.ic.unicamp.br