[theora-dev] IDCTSlow works on a FPGA prototype test

[Ralph Giles]

On Wed, Jun 14, 2006 at 10:41:14AM +0100, Philip Heron wrote:

> Is the plan to make a standalone hardware decoder, or to use the FPGA as
> a replacement for certain functions in libtheora? I love the idea of
> plugging in a PCI card and all apps using libtheora get instant hardware
> acceleration.

Portavales is doing a Google Summer of Code project on this. The idea is 
to do a hardware decoder, but a complete implementation is a little 
ambitious for the 3 month term, so the plan is to run libtheora on
a cpu (for example the LGPL LEON design) and have it call out to 
custom hardware for specific functions. It's a way to make piecemeal
hardware implementation possible. A "real" theora decoder chip could
then reuse the performance critical modules.

So yes, you could put that on an FGPA PCI card and get acceleration
in a normal host.

Cheers,
 -r