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<TITLE>Tremor lowmem on TI 55x DSP</TITLE>
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<P><FONT SIZE=2 FACE="Arial">I try to port Tremor lowmem on TI 55x DSP. </FONT>
<BR><FONT SIZE=2 FACE="Arial">I am not</FONT><SPAN LANG="en-gb"> <FONT SIZE=2 FACE="Arial">familiar</FONT></SPAN><SPAN LANG="de"> <FONT SIZE=2 FACE="Arial">with the 54x and actually I just started to work with the 55x.</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">But here is a short summery </FONT></SPAN>
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<P><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">55x 54x</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">2 16bit MAC 1 17bit MAC</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">3 data read busses 2 data read busses </FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">2 data write busses</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">32 KW (64KB) DRAM ?</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">64 KW (128KB) SRAM ?</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">Better DMA</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">Can only address words(2 bytes, can you believe this) ?</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">Fast SDRAM interface ?</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">Instruction cache ?</FONT></SPAN>
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<P><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">The ALUs seemed to be similar</FONT></SPAN>
<BR><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">Because of only three read data busses (stupid ) the two MACs have to share one parameter (or it is a constant which is in register)</FONT></SPAN></P>
<P><SPAN LANG="de"><FONT SIZE=2 FACE="Arial">Therefore the two MACs do not produce the double amount of MAC operations</FONT></SPAN>
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<P><SPAN LANG="de"><FONT FACE="Times New Roman">Thanks for the help</FONT></SPAN>
<BR><SPAN LANG="de"><FONT FACE="Times New Roman">Klaus</FONT></SPAN>
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