[tremor] Physical implementation of tremor

Mete BALCI mbalci at momentum-dmt.com
Sun Mar 30 22:21:14 PST 2003



What is the exact or approximate memory requirements for Vorbis and Tremor ?


---
Mete BALCI
Senior Game Programmer
Momentum DMT
Istanbul, TURKEY

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----- Original Message ----- 
From: "timmy brolin" <timmy at home.se>
To: <tremor at xiph.org>
Sent: Sunday, March 30, 2003 3:25 PM
Subject: Re: [tremor] Physical implementation of tremor

<p>The rather high memory requirements of tremor might be a bit of a problem for a hardware implementation. Memory is expensive.

-
Timmy

-----Original Message-----
From: Brendan Moran <annirak at bigfoot.com>
To: tremor at xiph.org
Date: Sat, 29 Mar 2003 19:24:35 -0800
Subject: [tremor] Physical implementation of tremor

Disclaimer:  I'm mostly a hobbyist at the moment.

It seems to me that with an integer only version of Ogg, it would make 
sense to build a VHDL or Verilog implementation of the codec.  If that were 
available, it, in combination with the XSOC project 
(http://www.fpgacpu.org/xsoc/index.html) might make it plausible to have an 
entire portable Ogg player implemented on a single FPGA (minus the DAC).

As I understand it, a large problem with audio compression formats is the 
processing power required to decode them.

 >There are no guarantees that this hardware will be sufficient to play 
Vorbis files
--From http://www.xiph.org/ogg/vorbis/hardware.html

There are a large number of MP3 decoding chips available, and that is part 
of what makes the MP3 standard popular among hobbyists and companies: they 
don't need much of a processor to implement the decoder, just something 
fast enough to get the data to the decoder in time for it to use the 
data.  And that's not too fast.

The availability of these chips mitigates the problem of the required 
processing power.  But, I haven't seen a chip capable of decoding Vorbis 
files yet.

Since VHDL and Verilog are Hardware Description Languages, having a Vorbis 
implementation in one of these might lead a chip manufacturer to produce a 
decoder chip.

Has anyone tried making a Verilog or VHDL implementation of Tremor?

--Brendan 

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