[tremor] [PATCH] significantly reduce Tremor ROM size requirement

[Nicolas Pitre]

On Thu, 5 Sep 2002, Monty wrote:

> During original work with arm-elf-gcc when working on code prior to
> Tremor.  Going to byte arrays there was a significant performance on
> the Netwinder.  However, it was not my compiler install and I did not
> inspect the asm; I merely noted the hit and moved on.

I suspect that your compiler didn't assume ARMv4 by default and that you 
were using signed char since the -fsigned-char compiler flag is used.  It 
then happens that on ARMv3 there is no instruction to load a byte and sign 
extend it.  For this code:

        int foo(signed char *x) {return *x;}

you therefore get this on ARMv3:

foo:
        ldrb    r0, [r0, #0]
        mov     r0, r0, asl #24
        mov     r0, r0, asr #24
        mov     pc, lr

while ARMv4 and higher produces:

foo:
        ldrsb   r0, [r0, #0]
        mov     pc, lr

Ther is a similar restriction on halfword (16 bit) access where ldrh and 
ldrsh simply don't exist on ARMv3 and earlier. So it's important that 
-march-armv4 be specified when compiling for ARM.

> Regardless, the above is indeed evidence that the char arrays are more
> efficient, at very least for ARM (which is currently the platform we
> care about most).  I'll apply that patch, and make a note to check
> performance on word-aligned-access platforms.

Well, ARM should fall in that category already.

<p>Nicolas

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