[tremor] A possible improvement for some of the processor where tables hit hard
Nicolas Pitre
nico at cam.org
Sun Oct 20 09:11:19 PDT 2002
On Sun, 20 Oct 2002, Monty wrote:
>
>
> > What's wrong here? 0xffffffffUL >> (32 - 0) should be 0 like the lookup
> > table.
>
> Not on Intel, which limit a shift to five bits. Funny, I was pretty
> certain ARM did too. Shift 32 == shift 0.
On ARM it depends if the shift argument is an immediate or a register.
5.1.6 Data-processing operands - Logical shift left by register
This data-processing operand is used to provide the value of a
register multiplied by a variable power of two.
This instruction operand is the value of register Rm, logically
shifted left by the value in the least significant byte of register
Rs. Zeros are inserted into the vacated bit positions. The carry-out
from the shifter is the last bit shifted out, which is zero if the
shift amount is more than 32, or the C flag if the shift amount is
zero.
<p>Nicolas
--- >8 ----
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