[Theora] FPGA implementation in the camera

Andrey Filippov theora at elphel.com
Sat Oct 30 00:50:11 PDT 2004

> How is your work on implementing the theora encoder in hardware coming
> along?
> If it works, would this allow for real-time compression of video?  Also,
> could this type of FPGA then be included in a webcam or a camcorder?
> Regards,
> John

I believe the work is going OK - you may follow the progress on our
sourceforge project page  - it is one of the posted tasks there. Verilog
code is in the CVS.

Yes it will allow to perform real-time compression, with exactly the frame
rate I was planning 1280x1024 at 30fps ("raw" pixel rate before Bayer-> YCbCr
4:2:0 conversion of 125/3~=42Mpix/sec.
The implementation is targeted to the particular network camera - Elphel
Model 333 (PCB shown here - http://www.elphel.com/3fhlo/10333/10333.gif).
Camera now uses the line of Micron CMOS image sensors (1280x1024,
1600x1200 and 2048x1536), the implementation will handle up to 5MPix on
this hardware.

This code should work fine for the steady network camera but not good for
camcorders - I'm not implementing motion compensation now.

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