[Theora] FPGA implementation in the camera - IDCT precision

[Andrey Filippov]

> I understand that IDCT algorithms in both encoder and decoder should
> produce exactly the same results. What I wonder is - why the precision of
> sinus/cosinus coefficients is selected so high? Isn't it an overkill for
> the 8 bit pixel values?
...

Never mind - with Xilinx Spartan 3 embedded multipliers it was rather easy
to implement exactly the IDCT algorithm specified.

But I still wonder - why DC bypassing is not included in the specs? It
adds just a single addition per pixel but increases the overall precision
(reduces errors coming from cos/sin integer approximations).

Why not to calculate DC always as in vii (see quote from Section 7.9.4
below) even if NCOEFFS[bi]>=2 and then, if (NCOEFFS[bi]>=2) subtract left
shifted value of
DC = (COEFFS[bi ][0]   QMAT[0] + 15) >> 5
from the DQC[0], perform procedure in Section 7.9.3, and add
DC = (COEFFS[bi ][0]   QMAT[0] + 15) >> 5
to each element of array RES?



--------------------------
7.9.4
...
vii. If NCOEFFS[bi] is less than 2:
  A. Using ACSCALE, DCSCALE, BMS, NQRS,
     QRSIZES, QRBMIS, qti , pli, and qi0 , use the procedure
     given in Section 6.4.3 to compute the DC quantization matrix
     QMAT.
  B. Assign DC the value (COEFFS[bi ][0]   QMAT[0] + 15) >> 5.
  C. Truncate DC to a 16-bit representation by dropping any
     higher-order bits.
  D. For each value of by from 0 to 7, and each value of bx from
     0 to 7, assign RES[by][bx ] the value DC.
viii. Otherwise:
  A. Assign qi the value QIS[QIIS[bi ]].
  B. Using ACSCALE, DCSCALE, BMS, NQRS,
     QRSIZES, QRBMIS, qti , pli, qi0 , and qi, compute DQC
     using the procedure given in Section 7.9.2.
  C. Using DQC, compute RES using the procedure given in Section 7.9.3.