Hi,<br><br>Good News!<br><br>After about 10 days of hardwork with leon I got to put the Theora decoder (software) running on LEON (FPGA).<br><br>That error was a Bug from OGG lib. I had a luck in to find a report from a group that put the Vorbis decoder on FPGA. It was a master thesis of 2 students
<a href="http://oggonachip.sourceforge.net/">http://oggonachip.sourceforge.net/</a> and in general, they had almost the same solution of us, the function that spend much time of processing (like Fourier transform) in Hardware and the others in Software, but they used the LEON2 (I am using LEON3) and FPGA XESS XSV-800 (I am using Cyclone).
<br>Vorbis uses the same OGG library and they found a solution for this unaligned address error.<br><br>"Theoretically passing the appropriate CC environment<br>variable to ./configure script and adding --disable-shared option
<br>(because the sparc-rtems-gcc that came with LECCS did not support shared library)<br>should accomplish the task. Practically however we found that Ogg library's<br>configure script failed to find the size of each integer variable type so
<br>extra lines in <a href="http://configure.in">configure.in</a> file were added as follows:<br>AC_CHECK_SIZEOF(short,2)<br>AC_CHECK_SIZEOF(int,4)<br>AC_CHECK_SIZEOF(long,4)<br>AC_CHECK_SIZEOF(long long,8)"<br><br><a href="http://oggonachip.sourceforge.net/oggonachip-1.0/report.pdf">
http://oggonachip.sourceforge.net/oggonachip-1.0/report.pdf</a> (page 44)<br><br>After to fix this, I had others problems...<br>0x09 data_access_exception: Access error during load or store instruction<br>I don't exactly why, but It is because the LEON or interface wasn't using the SDRAM, just SRAM, but Cyclone has 1 MB of SRAM and 16 SDRAM, and the addressing between these memory is not continuos. Then, It was happening a wrong addressing. After discovery this, the solution was just eliminate the SRAM from addressing (with a flag -nosram).
<br> <br>Now, the Theora decoder is running on LEON (FPGA) decoding a vetor of inputs.<br>I am thinking in to put this on uClinux in order to have a control of the video's files and the of player. What do you think about this?
<br><br><br>Tasks<br><br>- To find a configuration that be able to decode the Theora (OK - Completed)<br>- Synthesis of LEON3 (OK - Completed)<br>- To compile the Theora for LEON and to run this inside of the LEON/FPGA (OK - Completed)
<br><br>- Integrate the processor and theora hardware<br> - Cut the software, generating the inputs for ReconReframes2 and to include a AMBA protocol on software.<br> - To change the handshake of Theora Hardware of AVALON to AMBA protocol.
<br> - To discovery how to plug the Theora Hardware on AVALON and to control it with the LEON.<br><br>- To run testbenchs and to verify if it can be possible to decoding in timing of player. If not,<br>to do improvements and to run the testbenchs again.
<br><br><br>André Costa<br><br><div><span class="gmail_quote">On 5/30/07, <b class="gmail_sendername">André Costa</b> <<a href="mailto:andre.lnc@gmail.com">andre.lnc@gmail.com</a>> wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
Hi,<br><br>I had a lot of problems with the compilation, but I got to generate a binary for LEON.<br>However, there is a error when I run this in LEON (at FPGA). I will to explain what I am doing.<br><br>Firstly, it is the my compilation:
<br><br># Clean all<br>cd /path_theora_hw/<br>make distclean<br>cd libogg-1.1.3/<br>make distclean<br><br># Set CROSS-Compiler and parameters<br>export CC=sparc-elf-gcc<br>export CXX=sparc-elf-gcc<br>export CFLAGS='-mv8 -msoft-float'
<br><br>#Configure and install OGG lib<br>./configure --prefix=/path_theora_hw/ --target=sparc-elf --host=sparc-elf --enable-static <br>make<br>#I need to generate the bin's of OGG for LEON too and install in the path_theora_hw
<br>make install<br><br><br>#Configure and make Theora for LEON (sparc)<br>cd ../<br>./configure --prefix=/path_theora_hw/ --target=sparc-elf --host=sparc-elf --enable-static <br>#Here, I am compiling lib of theora and a dump_video_hardware.c
<br>make<br><br>----------------------------------<br><br>This dump_video_hardware.c is a modified file of dump_video.c that I created in order to test a player in LEON. I removed all file's functions and I am compiling with a vetor of inputs of datas encoded.
<br><br>Well, with these commands and some details* (below I will comment), I get the binary for LEON.<br>But, when I run there is this erro.<br><br>IU in error mode (tt = 0x07)<br>400013a4 e8220011 st %l4, [%o0 + %l1]<br>
<br>I got some informations from leon_sparc list and the trap type 0x07 is a memory access to unaligned address.<br>So my store "st %l4,[%o0+%l1]" is trying to save register l4 to an unaligned address (o0+l1).
<br>
Some architectures support unaligned stores by SPARC does not (just in 4 by 4 bytes). <br>Firsly I thought that it could be a bad compilation, but most likely it is not a bad compilation.<br>Some of the code may not be SPARC compatible and needs rewriting.
<br>I debug this and I discovered that this error is from function ogg_sync_pageout() (OGG lib).<br>This function do some copies of buffers and it should be doing some unaligned access. <br>I will probably have to rewrite this, but it depends on how the code was written in the first place some times it can be easily solved by aligning data structures.
<br><br>I can believe this! , Bad news!! Timothy and <span id="st" name="st" class="st">Ralph</span>, do you have any idea? do you know the OGG lib?<br><br><br>* Some considerations..<br>- A other doubt is with a file included in ogg/ogg.h, that is the "sys/type.h".
<br>It is a C header that is in "/usr/include/sys/sys.h". Then, when this file is include I don't know if any libray (and/or define's) compiled to my computer (x86) is linked. I think its improbable, but maybe it can be the cause of the problem.
<br><br>- The Cross compile didn't get recognize the function toupper() in the tagcompare() <comment.c>. Because I am not using this (I think its just used in Encoder) I disabled this.<br><br>Thanks,<br><span class="sg">
<br><br>
André Costa</span><div><span class="e" id="q_112dc5aff4de8705_2"><br><br><div><span class="gmail_quote">On 5/24/07, <b class="gmail_sendername">Ralph Giles</b> <<a href="mailto:giles@xiph.org" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">
giles@xiph.org
</a>> wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
On Thu, May 24, 2007 at 06:19:20PM -0300, André Costa wrote:<br><br>> Now I am working on BCC Cross-compiler in order to get the binaries for<br>> LEON3 (Google SoC 2007).<br><br>Woohoo! :)<br><br>> I changed these lines of Makefile ...
<br>><br>> CC = sparc-elf-gcc -mv8 -msoft-float<br>> CPP = sparc-elf-gcc -mv8 -msoft-float -E<br><br>I agree libtool is probably not picking up on the change. Try something<br>like CC="sparc-elf-gcc -mv8 -msoft-float" ./configure --target=sparc-elf
<br>and see if that works better.<br><br>The GNU autotools generally have very poor support for cross-compilation<br>though. It is probably worth just writing a custom makefile for it. Copy<br>the list of relevent files from lib/(*/)Makefile.am and copy the
<br>relevent defines from <a href="http://config.h.in" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">config.h.in</a>. You probably want:<br><br>#define THEORA_DISABLE_ENCODE 1<br><br>I don't think the library requires any of the others.
<br><br> -r<br><br>> PS: I wasn't getting to communicate with the LEON in FPGA by serial
<br>> interface, but I discovered the problem. The number code of my FPGA was<br>> slightly different. The difference was just in mapping of pins. When I<br>> changed of FPGA (to a cyclone), I got to run a hello word! For while I am
<br>> using the cyclone, but after I will need to map all the pins.<br></blockquote></div><br><br clear="all"><br></span></div><div><span class="e" id="q_112dc5aff4de8705_3">-- <br>André Costa<br>Gerente Técnico<br>Projeto BrazilIP
<br>LSC IC-UNICAMP <br><br>Cel: + 55 13 9201 1870
<br><a href="http://www.brazilip.org.br/" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">http://www.brazilip.org.br/</a>
</span></div></blockquote></div><br><br clear="all"><br>-- <br>André Costa<br>Gerente Técnico<br>Projeto BrazilIP<br>LSC IC-UNICAMP <br><br>Cel: + 55 13 9201 1870<br><a href="http://www.brazilip.org.br/">http://www.brazilip.org.br/
</a>