[theora-dev] FPGA encode stages flow diagram

digital design developer.fpga at gmail.com
Sat Mar 26 07:08:38 PDT 2011


>>* is advanced by the number of coe cients that are added to the block as each*>>* token is decoded. After fully decoding all the tokens with token index*>>* ti , the*>>* current token index of every coded block will be ti or greater...."*
>You need to read Section 7.7 of the spec thoroughly. I don't think you
>understand what a "token" represents yet.

>>* ok.*>>* for example, my encoder produce only two blocks:*>>* 1) in first block (after DCT) i have*>>* AC0=1;*
>I assume you mean DC, not AC0.

>>* AC(1..62)=0;*>>* AC63=1;*>>* so, after zig-zag + RLE  have tokens for*>>* AC0=(0,1);*>>* AC63=(62,1)*
>What you _actually_ have is (token,extra bits) pairs like so
>DC=(9, no extra bits) (i.e., value token, value==1)
>AC1=(8,111110) (i.e., zero run token, run-length==62)
>AC63=(9, no extra bits) (i.e., value token, value==1)

>*

>

** 1) in first block (after DCT) i have*

>I assume you meant in the second block.

>*

>

** AC0=1;*

>*

>

** AC1=1;*

>*

>

** AC(2..62)=0;*

>*

>

** AC63=1;*

>*

>

** so, after zig-zag + RLE have tokens for*

>*

>

** AC0=(0,1);*

>*

>

** AC1=(0,1);*

>*

>

** AC63=(61,1)*

>Again, the _actual_ tokens you would use are:
>DC=(9, no extra bits) (i.e., value token, value==1)
>AC1=(9, no extra bits) (i.e., value token, value==1)
>AC2=(8,111101) (i.e., zero run token, run-length==61)
>AC63=(9, no extra bits) (i.e., value token, value==1)

>*

>

** what about tokens for index 1-61?*

>The first block only has tokens for indexes 0, 1, and 63, which generate
>1 coefficient value, 62 coefficient values, and 1 coefficient value,
>respectively (for a total of 64).

>The second block has tokens for indexes 0, 1, 2, and 63, which generate
>1, 1, 61, and 1 coefficient, respectively, again for a total of 64.

>As an aside, actually having 64 coefficients in a block is unusual. It
>happens, but it is much more common to end with a long zero run. It is
>important not to actually code these as zero runs, but using an "End Of
>Block" (EOB) token (token values 0...6). EOBs are much, much cheaper
>than using an explicit zero run to end the block, in terms of bits.

Thank you Timothy!

Now i undestand how tokens are made from zig-zaged block. I redraw
stage-I in my blog http://developer-fpga.blogspot.com/, see diagram
https://lh4.googleusercontent.com/-wDLGljOWTCs/TY3ofIhqNzI/AAAAAAAAAp8/nvdCht-qjbc/s1600/stage1.a.jpg

 But i'm litle confused seen table 7.38 of Theora spec. How i
understand we use only 8 bit values in coder (for quantized
coefficient of block), but in table 7.38 is (for example token value =
22) i see tokenization of values more than 255? How it's possible?
Extrabits for token value=22 is 10 bits. This mean we can present
-512..+512 magnitude values for coeffs..... How it's possible? Ok. May
be this is why when DCTed our 8-bits values we at result have 16-bits
value out. Ok this is understand, but why realy thear are tokens  fo
10-bits value? (Is it  because we use quantization ?)

*
*
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