<div dir="ltr">Hi Jean-Marc,<div><br></div><div>Thanks!</div><div><br></div><div>Please find the 2 updated patches which only optimize stride 2 case and keep the bit exactness. They have passed our internal tests as usual.</div><div><br></div><div>Thanks,</div><div>Linfeng</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, May 15, 2017 at 9:36 AM, Jean-Marc Valin <span dir="ltr"><<a href="mailto:jmvalin@jmvalin.ca" target="_blank">jmvalin@jmvalin.ca</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Linfeng,<br>
<br>
Sorry for the delay -- I was actually trying to think of the best option<br>
here. For now, my preference would be to keep things bit-exact, but<br>
should there be more similar optimizations relying on 64-bit<br>
multiplication results, then we could consider having a special option<br>
to enable those (even in C).<br>
<br>
Cheers,<br>
<br>
Jean-Marc<br>
<span class="im HOEnZb"><br>
On 08/05/17 12:12 PM, Linfeng Zhang wrote:<br>
> Ping for comments.<br>
><br>
> Thanks,<br>
> Linfeng<br>
><br>
> On Wed, Apr 26, 2017 at 2:15 PM, Linfeng Zhang <<a href="mailto:linfengz@google.com">linfengz@google.com</a><br>
</span><span class="im HOEnZb">> <mailto:<a href="mailto:linfengz@google.com">linfengz@google.com</a>>> wrote:<br>
><br>
> On Tue, Apr 25, 2017 at 10:31 PM, Jean-Marc Valin<br>
</span><div class="HOEnZb"><div class="h5">> <<a href="mailto:jmvalin@jmvalin.ca">jmvalin@jmvalin.ca</a> <mailto:<a href="mailto:jmvalin@jmvalin.ca">jmvalin@jmvalin.ca</a>>> wrote:<br>
><br>
><br>
> > A_Q28 is split to 2 14-bit (or 16-bit, whatever) integers, to make the<br>
> > multiplication operation within 32-bits. NEON can do 32-bit x 32-bit =<br>
> > 64-bit using 'int64x2_t vmull_s32(int32x2_t a, int32x2_t b)', and it<br>
> > could possibly be faster and less rounding/shifting errors than above C<br>
> > code. But it may increase difficulties for other CPUs not supporting<br>
> > 32-bit multiplication.<br>
><br>
> OK, so I'm not totally opposed to that, but it increases the<br>
> testing/maintenance cost so it needs to be worth it. So the<br>
> question is<br>
> how much speedup can you get and how close you can make the<br>
> result to<br>
> the original function. If you can make the output be always<br>
> within one<br>
> of two LSBs of the C version, then the asm check can simply be a<br>
> little<br>
> bit more lax than usual. Otherwise it becomes more complicated. This<br>
> isn't a function that scares me too much about going<br>
> non-bitexact, but<br>
> it's also not one of the big complexity costs either. In any<br>
> case, let<br>
> me know what you find.<br>
><br>
><br>
> Tested the proposed NEON optimization change, it can increase the<br>
> whole encoder speed by about 1% at Complexity 8 and 10 for stride =<br>
> 2 (compared to the NEON optimization in the previous patch), and<br>
> 0.7% at Complexity 8 and 1.1% at Complexity 10 for stride = 1<br>
> (compared to the original C code).<br>
><br>
> Unfortunately, the truncating difference accumulates in S[] and its<br>
> difference cannot be easily bounded. The difference in out[] may<br>
> somehow be bounded to 5 in my quick testing, but is not guaranteed<br>
> to other inputs. So maybe comparing bit exactness with the<br>
> following silk_biquad_alt_c_<wbr>MulSingleAQ28() is better.<br>
><br>
> Please let me know the decision (whether keeping the original NEON<br>
> (stride 2 only) or choosing the new NEON (both stride 1 and 2) which<br>
> optimizes following silk_biquad_alt_c_<wbr>MulSingleAQ28()), and I'll<br>
> wrap up the patch.<br>
><br>
> Here attached the corresponding C<br>
> code silk_biquad_alt_c_<wbr>MulSingleAQ28() for your information. It uses<br>
> 64-bit multiplications and is about 0.6% - 0.9% slower (for the<br>
> whole encoder) than the original C code using 32-bit multiplications<br>
> (for both strides and the same stride 2 unrolling).<br>
><br>
> void silk_biquad_alt_c_<wbr>MulSingleAQ28(<br>
> const opus_int16 *in, /* I input<br>
> signal */<br>
> const opus_int32 *B_Q28, /* I MA<br>
> coefficients [3] */<br>
> const opus_int32 *A_Q28, /* I AR<br>
> coefficients [2] */<br>
> opus_int32 *S, /* I/O State<br>
> vector [2*stride] */<br>
> opus_int16 *out, /* O output<br>
> signal */<br>
> const opus_int32 len, /* I signal<br>
> length (must be even) */<br>
> opus_int stride /* I Operate<br>
> on interleaved signal if > 1 */<br>
> )<br>
> {<br>
> /* DIRECT FORM II TRANSPOSED (uses 2 element state vector) */<br>
> opus_int k;<br>
><br>
> silk_assert( ( stride == 1 ) || ( stride == 2 ) );<br>
><br>
> if( stride == 1) {<br>
> opus_int32 out32_Q14;<br>
> for( k = 0; k < len; k++ ) {<br>
> /* S[ 0 ], S[ 1 ]: Q12 */<br>
> out32_Q14 = silk_LSHIFT( silk_SMLAWB( S[ 0 ], B_Q28[ 0<br>
> ], in[ k ] ), 2 );<br>
><br>
> S[ 0 ] = S[ 1 ] + silk_RSHIFT_ROUND(<br>
> (opus_int64)out32_Q14 * (-A_Q28[ 0 ]), 30 );<br>
> S[ 0 ] = silk_SMLAWB( S[ 0 ], B_Q28[ 1 ], in[ k ] );<br>
><br>
> S[ 1 ] = silk_RSHIFT_ROUND( (opus_int64)out32_Q14 *<br>
> (-A_Q28[ 1 ]) , 30 );<br>
> S[ 1 ] = silk_SMLAWB( S[ 1 ], B_Q28[ 2 ], in[ k ] );<br>
><br>
> /* Scale back to Q0 and saturate */<br>
> out[ k ] = (opus_int16)silk_SAT16( silk_RSHIFT(<br>
> out32_Q14 + (1<<14) - 1, 14 ) );<br>
> }<br>
> } else {<br>
> opus_int32 out32_Q14[ 2 ];<br>
> for( k = 0; k < len; k++ ) {<br>
> /* S[ 0 ], S[ 1 ]: Q12 */<br>
> out32_Q14[ 0 ] = silk_LSHIFT( silk_SMLAWB( S[ 0 ],<br>
> B_Q28[ 0 ], in[ k * 2 + 0 ] ), 2 );<br>
> out32_Q14[ 1 ] = silk_LSHIFT( silk_SMLAWB( S[ 2 ],<br>
> B_Q28[ 0 ], in[ k * 2 + 1 ] ), 2 );<br>
><br>
> S[ 0 ] = S[ 1 ] + silk_RSHIFT_ROUND(<br>
> (opus_int64)out32_Q14[ 0 ] * (-A_Q28[ 0 ]), 30 );<br>
> S[ 2 ] = S[ 3 ] + silk_RSHIFT_ROUND(<br>
> (opus_int64)out32_Q14[ 1 ] * (-A_Q28[ 0 ]), 30 );<br>
> S[ 0 ] = silk_SMLAWB( S[ 0 ], B_Q28[ 1 ], in[ k * 2 + 0 ] );<br>
> S[ 2 ] = silk_SMLAWB( S[ 2 ], B_Q28[ 1 ], in[ k * 2 + 1 ] );<br>
><br>
> S[ 1 ] = silk_RSHIFT_ROUND( (opus_int64)out32_Q14[ 0 ] *<br>
> (-A_Q28[ 1 ]), 30 );<br>
> S[ 3 ] = silk_RSHIFT_ROUND( (opus_int64)out32_Q14[ 1 ] *<br>
> (-A_Q28[ 1 ]), 30 );<br>
> S[ 1 ] = silk_SMLAWB( S[ 1 ], B_Q28[ 2 ], in[ k * 2 + 0 ] );<br>
> S[ 3 ] = silk_SMLAWB( S[ 3 ], B_Q28[ 2 ], in[ k * 2 + 1 ] );<br>
><br>
> /* Scale back to Q0 and saturate */<br>
> out[ k * 2 + 0 ] = (opus_int16)silk_SAT16( silk_RSHIFT(<br>
> out32_Q14[ 0 ] + (1<<14) - 1, 14 ) );<br>
> out[ k * 2 + 1 ] = (opus_int16)silk_SAT16( silk_RSHIFT(<br>
> out32_Q14[ 1 ] + (1<<14) - 1, 14 ) );<br>
> }<br>
> }<br>
> }<br>
><br>
> Here is the NEON kernels which uses vqrdmulh_lane_s32() to do the<br>
> multiplication and rounding, where A_Q28_s32x{2,4} stores doubled<br>
> -A_Q28[]:<br>
><br>
> static inline void silk_biquad_alt_stride1_<wbr>kernel(const int32x2_t<br>
> A_Q28_s32x2, const int32x4_t t_s32x4, int32x2_t *S_s32x2, int32x2_t<br>
> *out32_Q14_s32x2)<br>
> {<br>
> int32x2_t t_s32x2;<br>
><br>
> *out32_Q14_s32x2 = vadd_s32(*S_s32x2, vget_low_s32(t_s32x4));<br>
> /* silk_SMLAWB( S[ 0 ], B_Q28[ 0 ], in[ k ]<br>
> ) */<br>
> *S_s32x2 =<br>
> vreinterpret_s32_u64(vshr_n_<wbr>u64(vreinterpret_u64_s32(*S_<wbr>s32x2),<br>
> 32)); /* S[ 0 ] = S[ 1 ]; S[ 1 ] = 0;<br>
> */<br>
> *out32_Q14_s32x2 = vshl_n_s32(*out32_Q14_s32x2, 2);<br>
> /* out32_Q14 = silk_LSHIFT( silk_SMLAWB( S[<br>
> 0 ], B_Q28[ 0 ], in[ k ] ), 2 ); */<br>
> t_s32x2 = vqrdmulh_lane_s32(A_Q28_s32x2,<br>
> *out32_Q14_s32x2, 0); /* silk_RSHIFT_ROUND(<br>
> (opus_int64)out32_Q14 * (-A_Q28[ {0,1} ]), 30 ) */<br>
> *S_s32x2 = vadd_s32(*S_s32x2, t_s32x2);<br>
> /* S[ {0,1} ] = {S[ 1 ],0} +<br>
> silk_RSHIFT_ROUND( ); */<br>
> *S_s32x2 = vadd_s32(*S_s32x2, vget_high_s32(t_s32x4));<br>
> /* S[ {0,1} ] = silk_SMLAWB( S[ {0,1} ],<br>
> B_Q28[ {1,2} ], in[ k ] ); */<br>
> }<br>
><br>
> static inline void silk_biquad_alt_stride2_<wbr>kernel(const int32x4_t<br>
> A_Q28_s32x4, const int32x4_t B_Q28_s32x4, const int32x2_t t_s32x2,<br>
> const int32x4_t inval_s32x4, int32x4_t *S_s32x4, int32x2_t<br>
> *out32_Q14_s32x2)<br>
> {<br>
> int32x4_t t_s32x4, out32_Q14_s32x4;<br>
><br>
> *out32_Q14_s32x2 = vadd_s32(vget_low_s32(*S_<wbr>s32x4), t_s32x2);<br>
> /* silk_SMLAWB( S{0,1}, B_Q28[ 0 ], in[ k * 2 + {0,1} ] )<br>
> */<br>
> *S_s32x4 = vcombine_s32(vget_high_s32(*S_<wbr>s32x4),<br>
> vdup_n_s32(0)); /* S{0,1} = S{2,3}; S{2,3} = 0;<br>
> */<br>
> *out32_Q14_s32x2 = vshl_n_s32(*out32_Q14_s32x2, 2);<br>
> /* out32_Q14_{0,1} = silk_LSHIFT( silk_SMLAWB( S{0,1},<br>
> B_Q28[ 0 ], in[ k * 2 + {0,1} ] ), 2 ); */<br>
> out32_Q14_s32x4 = vcombine_s32(*out32_Q14_s32x2,<br>
> *out32_Q14_s32x2); /* out32_Q14_{0,1,0,1}<br>
> */<br>
> t_s32x4 = vqrdmulhq_s32(out32_Q14_s32x4, A_Q28_s32x4);<br>
> /* silk_RSHIFT_ROUND( (opus_int64)out32_Q14[ {0,1,0,1} ] *<br>
> (-A_Q28[ {0,0,1,1} ]), 30 ) */<br>
> *S_s32x4 = vaddq_s32(*S_s32x4, t_s32x4);<br>
> /* S[ {0,1,2,3} ] = {S[ {2,3} ],0,0} + silk_RSHIFT_ROUND( );<br>
> */<br>
> t_s32x4 = vqdmulhq_s32(inval_s32x4, B_Q28_s32x4);<br>
> /* silk_SMULWB(B_Q28[ {1,1,2,2} ], in[ k * 2 + {0,1,0,1} ] )<br>
> */<br>
> *S_s32x4 = vaddq_s32(*S_s32x4, t_s32x4);<br>
> /* S[ {0,1,2,3} ] = silk_SMLAWB( S[ {0,1,2,3} ], B_Q28[<br>
> {1,1,2,2} ], in[ k * 2 + {0,1,0,1} ] ); */<br>
> }<br>
><br>
> Thanks,<br>
> Linfeng<br>
><br>
><br>
</div></div></blockquote></div><br></div>