[CELT-dev] Possible Bug

[Riccardo Micci]

Thank you very much! 
Do you know someone else who could give me a better estimation even on 
C6x?

Regards
Riccardo


Riccardo Micci
Senior DSP Engineer, Wireless Group 
Cambridge Consultants
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Jean-Marc Valin <Jean-Marc.Valin at USherbrooke.ca> 
02/09/2010 15:21

To
Riccardo Micci <riccardo.micci at cambridgeconsultants.com>
cc
celt-dev at xiph.org
Subject
Re: [CELT-dev] Possible Bug






Riccardo Micci <riccardo.micci at cambridgeconsultants.com> a écrit :

> It is indeed a 16 bits char architecture and this explains the problem
> since end_bits_left is 0. Anyway a correct initialization should be
> preferable in this case.

It fixed in git now that I know it's the real problem. Thanks a lot 
for reporting the problem!

> Unrelated question: i see that CELT has been already ported to TI
> platform. I'd need some performance estimation on those DSPs. I see that
> you wrote fixed_c5x.h header file, would you mind giving me some number 
if
> you have them?

I didn't write the fixed_c5x.h myself (and I'm not sure it's even 
up-to-date anymore(, but from what I remember an earlier version of 
CELT (around 0.4 or 0.5) was running with 60 MIPS on a C55. It may 
have gone up or down a bit since then, I don't know.

Cheers,

     Jean-Marc







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