[flac-dev] PATCH for cpu.c

lvqcl lvqcl.mail at gmail.com
Fri Mar 21 12:00:38 PDT 2014


Explanation of changes in this patch:

1)
'CALLBACK' was changed to 'WINAPI' because the signature of
an unhandled exception filter is
LONG (WINAPI *unhandled_func)(struct _EXCEPTION_POINTERS);

2)
The code

     if(info->ia32.fxsr || info->ia32.sse || info->ia32.sse2) {
     [...]
     }

was replaced by

     if(info->ia32.sse) {
     [...]
     }
     else
         info->ia32.fxsr = info->ia32.sse = [...] = false;

Reason: there's no point to test OS SSE support if SSE (SSE1) is not supported
by CPU. Also the detection code tries to execute SSE1 instruction xorps;
it doesn't make sense if SSE1 isn't supported (i.e. info->ia32.sse==false).
If info->ia32.sse is true then both old and new conditions are true.
The 'else' branch isn't necessary but I wanted to play safe.

3)
"=r"(sse):"r"(sse) asm constraint was changed to "=r"(sse):"0"(sse).

 From http://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html :
"Only a number in the constraint can guarantee that one operand is in
the same place as another. The mere fact that foo is the value of both
operands is not enough to guarantee that they are in the same place in
the generated assembler code."

This fix makes "xorl %0,%0" unnecessary.

4)
A comment about SetUnhandledExceptionFilter was added.

5)
URL fixes: http://www.hick.org/~mmiller/msvc_inline_asm.html doesn't exist
any more, http://www.codeproject.com/cpp/gccasm.asp now has different address.

6)
"if (info->ia32.fxsr && info->ia32.sse)" was changed to "if (info->ia32.fxsr)"
because now info->ia32.sse is always true in this block.
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