[xiph-commits] r11355 - in branches/theora-mmx: . lib

[j at svn.xiph.org]

Author: j
Date: 2006-05-06 15:40:20 -0700 (Sat, 06 May 2006)
New Revision: 11355

Modified:
   branches/theora-mmx/configure.ac
   branches/theora-mmx/lib/cpu.c
Log:
this version works and is tested on:
 P3, P4, Athlon XP and AMD64



Modified: branches/theora-mmx/configure.ac
===================================================================
--- branches/theora-mmx/configure.ac	2006-05-06 21:17:26 UTC (rev 11354)
+++ branches/theora-mmx/configure.ac	2006-05-06 22:40:20 UTC (rev 11355)
@@ -108,12 +108,12 @@
 case $target_cpu in
 	i[[3456]]86)
 		cpu_x86_32=yes 
-    cpu_optimization="32bit x86"
-    ;;
+		cpu_optimization="32bit x86"
+    	;;
 	x86_64)
 		cpu_x86_64=yes
-    cpu_optimization="64bit x86"
-    ;;
+		cpu_optimization="64bit x86"
+	;;
 esac
 AM_CONDITIONAL([CPU_x86_64], [test x$cpu_x86_64 = xyes])
 AM_CONDITIONAL([CPU_x86_32], [test x$cpu_x86_32 = xyes])

Modified: branches/theora-mmx/lib/cpu.c
===================================================================
--- branches/theora-mmx/lib/cpu.c	2006-05-06 21:17:26 UTC (rev 11354)
+++ branches/theora-mmx/lib/cpu.c	2006-05-06 22:40:20 UTC (rev 11355)
@@ -54,13 +54,8 @@
   ogg_uint32_t eax, ebx, ecx, edx;
   ogg_uint32_t flags = 0;
 
-  /* check for cpuid support */
-
-#if defined(__x86_64__)
-
-  /* no need to check, we have cpuid on x86_64 */
-
-#elif defined(__i386__)
+  /* check for cpuid support on i386 */
+#if defined(__i386__)
   asm volatile ("pushfl              \n\t"
                 "pushfl              \n\t"
                 "popl %0             \n\t"
@@ -80,38 +75,22 @@
     return 0;
 #endif
 
-  cpuid(0, &eax, &ebx, &ecx, &edx);
+  //cpuid(0, &eax, &ebx, &ecx, &edx);
+  /* Intel */
+  cpuid(1, &eax, &ebx, &ecx, &edx);
+  if ((edx & 0x00800000) == 0)
+    return 0;
+  flags |= CPU_X86_MMX;
+  if (edx & 0x02000000)
+    flags |= CPU_X86_MMXEXT | CPU_X86_SSE;
+  if (edx & 0x04000000)
+    flags |= CPU_X86_SSE2;
 
-#if 0
-  if (ebx == 0x756e6547 &&
-      edx == 0x49656e69 &&
-      ecx == 0x6c65746e) {
-    /* intel */
-
-  inteltest:
-#endif
-    cpuid(1, &eax, &ebx, &ecx, &edx);
-    if ((edx & 0x00800000) == 0)
-      return 0;
-    flags |= CPU_X86_MMX;
-    if (edx & 0x02000000)
-      flags |= CPU_X86_MMXEXT | CPU_X86_SSE;
-    if (edx & 0x04000000)
-      flags |= CPU_X86_SSE2;
-#if 0
-    return flags;
-  } else
-#endif
-
-  if (ebx == 0x68747541 &&
-      edx == 0x69746e65 &&
-      ecx == 0x444d4163) {
-    /* AMD */
-    cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
-    if (eax >= 0x80000001) {
-      cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
-      if ((edx & 0x00800000) == 0)
-        return 0;
+  /* AMD */
+  cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
+  if(eax >= 0x80000001) {
+    cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
+    if ((edx & 0x00800000) != 0) {
       flags |= CPU_X86_MMX;
       if (edx & 0x80000000)
         flags |= CPU_X86_3DNOW;
@@ -119,23 +98,17 @@
         flags |= CPU_X86_3DNOWEXT;
       if (edx & 0x00400000)
         flags |= CPU_X86_MMXEXT;
-      /* return flags; */
     }
   }
-#if 0
-  else {
-    /* implement me */
-  }
-#endif
 
   if (flags) {
     fprintf(stderr, "vectorized instruction sets supported: ");
-    if (flags | CPU_X86_MMX)      fprintf(stderr, "mmx ");
-    if (flags | CPU_X86_MMXEXT)   fprintf(stderr, "mmxext ");
-    if (flags | CPU_X86_SSE)      fprintf(stderr, "sse ");
-    if (flags | CPU_X86_SSE2)     fprintf(stderr, "sse2 ");
-    if (flags | CPU_X86_3DNOW)    fprintf(stderr, "3dnow ");
-    if (flags | CPU_X86_3DNOWEXT) fprintf(stderr, "3dnowext ");
+    if (flags & CPU_X86_MMX)      fprintf(stderr, "mmx ");
+    if (flags & CPU_X86_MMXEXT)   fprintf(stderr, "mmxext ");
+    if (flags & CPU_X86_SSE)      fprintf(stderr, "sse ");
+    if (flags & CPU_X86_SSE2)     fprintf(stderr, "sse2 ");
+    if (flags & CPU_X86_3DNOW)    fprintf(stderr, "3dnow ");
+    if (flags & CPU_X86_3DNOWEXT) fprintf(stderr, "3dnowext ");
     fprintf(stderr, "\n");
   }