[xiph-commits] r11318 - trunk/speex/libspeex

[jm at svn.xiph.org]

Author: jm
Date: 2006-04-29 06:39:59 -0700 (Sat, 29 Apr 2006)
New Revision: 11318

Modified:
   trunk/speex/libspeex/filters.c
   trunk/speex/libspeex/filters_bfin.h
Log:
blackfin assembly for iir_mem16


Modified: trunk/speex/libspeex/filters.c
===================================================================
--- trunk/speex/libspeex/filters.c	2006-04-29 13:04:28 UTC (rev 11317)
+++ trunk/speex/libspeex/filters.c	2006-04-29 13:39:59 UTC (rev 11318)
@@ -350,6 +350,7 @@
 #endif
 
 #ifdef FIXED_POINT
+#ifndef OVERRIDE_IIR_MEM16
 void iir_mem16(const spx_word16_t *x, const spx_coef_t *den, spx_word16_t *y, int N, int ord, spx_mem_t *mem)
 {
    int i,j;
@@ -367,6 +368,7 @@
       y[i] = yi;
    }
 }
+#endif
 #else
 void iir_mem16(const spx_word16_t *x, const spx_coef_t *den, spx_word16_t *y, int N, int ord, spx_mem_t *mem)
 {

Modified: trunk/speex/libspeex/filters_bfin.h
===================================================================
--- trunk/speex/libspeex/filters_bfin.h	2006-04-29 13:04:28 UTC (rev 11317)
+++ trunk/speex/libspeex/filters_bfin.h	2006-04-29 13:39:59 UTC (rev 11318)
@@ -326,9 +326,7 @@
       "R0 = (A0 += A1) || I2 += M0;\n\t"
       "R0 = R0 >>> 13 || R5 = W[P0++];\n\t" /* load x */
       "R0.L = R0.L + R5.L;\n\t"
-      "W[P1++] = R0;\n\t" /* shift y | store y */
-      //"R5 = R5 << 2;\n\t"
-      "R5 = PACK(R0.L, R5.L);\n\t"
+      "R5 = PACK(R0.L, R5.L) || W[P1++] = R0;\n\t" /* shift y | store y */
       "A1 = A0 = 0 || [I2--] = R5\n\t"
       "LOOP_END filter_mid%=;\n\t"
    "I2 += 4;\n\t"
@@ -486,6 +484,130 @@
 
 }
 
+
+#define OVERRIDE_IIR_MEM16
+void iir_mem16(const spx_word16_t *_x, const spx_coef_t *den, spx_word16_t *_y, int N, int ord, spx_mem_t *mem)
+{
+   spx_word16_t y[N+2];
+   spx_word16_t *yy;
+   yy = y+2;
+   __asm__ __volatile__
+   (
+   /* Register setup */
+   "R0 = %5;\n\t"      /*ord */
+   
+   "P1 = %3;\n\t"
+   "I1 = P1;\n\t"
+   "B1 = P1;\n\t"
+   "L1 = 0;\n\t"
+   
+   "P3 = %0;\n\t"
+   "I3 = P3;\n\t"
+   "L3 = 0;\n\t"
+   
+   "P4 = %6;\n\t"
+   "P0 = %1;\n\t"
+   "P1 = %2;\n\t"
+   
+   /* First sample */
+   "R1 = [P4++];\n\t"
+   "R1 >>>= 13;\n\t"
+   "R2 = W[P0++];\n\t"
+   "R1 = R1 + R2;\n\t"
+   "W[P1++] = R1;\n\t"
+   //"R1 <<= 2;\n\t"
+   "W[P3] = R1;\n\t"
+   //"R2 <<= 2;\n\t"
+
+   /* Samples 1 to ord-1 (using memory) */
+   "R0 += -1;\n\t"
+   "R3 = 0;\n\t"
+   "LC0 = R0;\n\t"
+   "LOOP filter_start%= LC0;\n\t"
+   "LOOP_BEGIN filter_start%=;\n\t"
+      "R3 += 1;\n\t"
+      "LC1 = R3;\n\t"
+      
+      "R1 = [P4++];\n\t"
+      "A1 = R1;\n\t"
+      "I1 = B1;\n\t"
+      "I3 = P3;\n\t"
+      "P3 += 2;\n\t"
+      "LOOP filter_start_inner%= LC1;\n\t"
+      "LOOP_BEGIN filter_start_inner%=;\n\t"
+         "R4.L = W[I1++];\n\t"
+         "R5.L = W[I3--];\n\t"
+         "A1 -= R4.L*R5.L (IS);\n\t"
+      "LOOP_END filter_start_inner%=;\n\t"
+   
+      "R1 = A1;\n\t"
+      "R1 >>>= 13;\n\t"
+      "R2 = W[P0++];\n\t"
+      "R1 = R1 + R2;\n\t"
+      "W[P1++] = R1;\n\t"
+      //"R1 <<= 2;\n\t"
+      "W[P3] = R1;\n\t"
+      //"R2 <<= 2;\n\t"
+   "LOOP_END filter_start%=;\n\t"
+
+   /* Samples ord to N*/   
+   "R0 = %5;\n\t"
+   "R0 <<= 1;\n\t"
+   "I1 = B1;\n\t"
+   "L1 = R0;\n\t"
+   
+   "R0 = %5;\n\t"
+   "R2 = %4;\n\t"
+   "R2 = R2 - R0;\n\t"
+   "R4.L = W[I1++];\n\t"
+   "LC0 = R2;\n\t"
+   "LOOP filter_mid%= LC0;\n\t"
+   "LOOP_BEGIN filter_mid%=;\n\t"
+      "LC1 = R0;\n\t"
+      "A1 = 0;\n\t"
+      "I3 = P3;\n\t"
+      "P3 += 2;\n\t"
+      "R5.L = W[I3--];\n\t"
+      "LOOP filter_mid_inner%= LC1;\n\t"
+      "LOOP_BEGIN filter_mid_inner%=;\n\t"
+         "A1 -= R4.L*R5.L (IS) || R4.L = W[I1++] || R5.L = W[I3--];\n\t"
+      "LOOP_END filter_mid_inner%=;\n\t"
+      "R1 = A1;\n\t"
+      "R1 = R1 >>> 13 || R2 = W[P0++];\n\t"
+      "R1 = R1 + R2;\n\t"
+      "W[P1++] = R1;\n\t"
+      "W[P3] = R1;\n\t"
+   "LOOP_END filter_mid%=;\n\t"
+     
+   /* Update memory */
+   "P4 = %6;\n\t"
+   "R0 = %5;\n\t"
+   "LC0 = R0;\n\t"
+   "P1 = B1;\n\t"
+   "LOOP mem_update%= LC0;\n\t"
+   "LOOP_BEGIN mem_update%=;\n\t"
+      "A0 = 0;\n\t"
+      "I3 = P3;\n\t"
+      "I1 = P1;\n\t"
+      "P1 += 2;\n\t"
+      "R0 = LC0;\n\t"
+      "LC1=R0;\n\t"
+      "R5.L = W[I3--] || R4.L = W[I1++];\n\t"
+      "LOOP mem_accum%= LC1;\n\t"
+      "LOOP_BEGIN mem_accum%=;\n\t"
+         "A0 -= R4.L*R5.L (IS) || R4.L = W[I1++] || R5.L = W[I3--];\n\t"
+      "LOOP_END mem_accum%=;\n\t"
+      "R0 = A0;\n\t"
+      "[P4++] = R0;\n\t"
+   "LOOP_END mem_update%=;\n\t"
+   "L1 = 0;\n\t"
+   : : "m" (yy), "m" (_x), "m" (_y), "m" (den), "m" (N), "m" (ord), "m" (mem)
+   : "A0", "A1", "R0", "R1", "R2", "R3", "R4", "R5", "P0", "P1", "P2", "P3", "P4", "B1", "I1", "I3", "L1", "L3", "memory"
+   );
+
+}
+
+
 #define OVERRIDE_FIR_MEM2
 void fir_mem2(const spx_sig_t *x, const spx_coef_t *num, spx_sig_t *y, int N, int ord, spx_mem_t *mem)
 {