[xiph-commits] r8841 - trunk/speex/libspeex
jm at motherfish-iii.xiph.org
jm at motherfish-iii.xiph.org
Sun Feb 6 16:35:37 PST 2005
Author: jm
Date: 2005-02-06 16:35:36 -0800 (Sun, 06 Feb 2005)
New Revision: 8841
Modified:
trunk/speex/libspeex/fixed_arm5e.h
Log:
ARM assembly version of DIV32_16
Modified: trunk/speex/libspeex/fixed_arm5e.h
===================================================================
--- trunk/speex/libspeex/fixed_arm5e.h 2005-02-05 23:23:22 UTC (rev 8840)
+++ trunk/speex/libspeex/fixed_arm5e.h 2005-02-07 00:35:36 UTC (rev 8841)
@@ -115,8 +115,92 @@
#define MUL_16_32_R15(a,bh,bl) ADD32(MULT16_16((a),(bh)), SHR(MULT16_16((a),(bl)),15))
+/*
+#define DIV32_16(a,b) ((short)(((signed int)(a))/((short)(b))))
+*/
+inline short DIV3216(int a, int b)
+{
+ int res=0;
+ int dead1, dead2, dead3, dead4, dead5;
+ __asm__ __volatile__ (
+ "\teor %5, %0, %1\n"
+ "\tmovs %4, %0\n"
+ "\trsbmi %0, %0, #0 \n"
+ "\tmovs %4, %1\n"
+ "\trsbmi %1, %1, #0 \n"
+ "\tmov %4, #1\n"
-#define DIV32_16(a,b) ((short)(((signed int)(a))/((short)(b))))
+ "\tsubs %3, %0, %1, asl #14 \n"
+ "\torrpl %2, %2, %4, asl #14 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #13 \n"
+ "\torrpl %2, %2, %4, asl #13 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #12 \n"
+ "\torrpl %2, %2, %4, asl #12 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #11 \n"
+ "\torrpl %2, %2, %4, asl #11 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #10 \n"
+ "\torrpl %2, %2, %4, asl #10 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #9 \n"
+ "\torrpl %2, %2, %4, asl #9 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #8 \n"
+ "\torrpl %2, %2, %4, asl #8 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #7 \n"
+ "\torrpl %2, %2, %4, asl #7 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #6 \n"
+ "\torrpl %2, %2, %4, asl #6 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #5 \n"
+ "\torrpl %2, %2, %4, asl #5 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #4 \n"
+ "\torrpl %2, %2, %4, asl #4 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #3 \n"
+ "\torrpl %2, %2, %4, asl #3 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #2 \n"
+ "\torrpl %2, %2, %4, asl #2 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1, asl #1 \n"
+ "\torrpl %2, %2, %4, asl #1 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tsubs %3, %0, %1 \n"
+ "\torrpl %2, %2, %4 \n"
+ "\tmovpl %0, %3 \n"
+
+ "\tmovs %5, %5, lsr #31 \n"
+ "\trsbne %2, %2, #0 \n"
+ : "=r" (dead1), "=r" (dead2), "=r" (res),
+ "=r" (dead3), "=r" (dead4), "=r" (dead5)
+ : "0" (a), "1" (b), "2" (res)
+ : "memory", "cc"
+ );
+ return res;
+}
+
+
#define DIV32(a,b) (((signed int)(a))/((signed int)(b)))
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